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A digital partial built-in self-test structure for a high performance automatic gain control circuit

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Conference contribution/Paper › peer-review

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A digital partial built-in self-test structure for a high performance automatic gain control circuit. / Lechner, A ; Ferguson, J ; Richardson, A et al.
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS. ed. / D Borrione; R Ernst. LOS ALAMITOS: IEEE COMPUTER SOC, 1999. p. 232-238.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Conference contribution/Paper › peer-review

Harvard

Lechner, A, Ferguson, J, Richardson, A & Hermes, B 1999, A digital partial built-in self-test structure for a high performance automatic gain control circuit. in D Borrione & R Ernst (eds), DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS. IEEE COMPUTER SOC, LOS ALAMITOS, pp. 232-238. https://doi.org/10.1109/DATE.1999.761127

APA

Lechner, A., Ferguson, J., Richardson, A., & Hermes, B. (1999). A digital partial built-in self-test structure for a high performance automatic gain control circuit. In D. Borrione, & R. Ernst (Eds.), DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS (pp. 232-238). IEEE COMPUTER SOC. https://doi.org/10.1109/DATE.1999.761127

Vancouver

Lechner A, Ferguson J, Richardson A, Hermes B. A digital partial built-in self-test structure for a high performance automatic gain control circuit. In Borrione D, Ernst R, editors, DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS. LOS ALAMITOS: IEEE COMPUTER SOC. 1999. p. 232-238 doi: 10.1109/DATE.1999.761127

Author

Lechner, A ; Ferguson, J ; Richardson, A et al. / A digital partial built-in self-test structure for a high performance automatic gain control circuit. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS. editor / D Borrione ; R Ernst. LOS ALAMITOS : IEEE COMPUTER SOC, 1999. pp. 232-238

Bibtex

@inproceedings{085ac50d75804975b062c56febe2e519,
title = "A digital partial built-in self-test structure for a high performance automatic gain control circuit",
abstract = "It is now widely recognised that Design-for-Testability and Built-in Self-Test techniques rc ill be mandatory to meet test and quality specifications in next generation mired signal integrated systems. This paper describes a new digital on-chip post processing function capable of reducing production test time for a high performance automatic gain control circuit by 70%.",
keywords = "DESIGN-FOR-TEST, ANALOG, BIST, DAC, ADC",
author = "A Lechner and J Ferguson and A Richardson and B Hermes",
year = "1999",
doi = "10.1109/DATE.1999.761127",
language = "English",
isbn = "0-7695-0078-1",
pages = "232--238",
editor = "D Borrione and R Ernst",
booktitle = "DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS",
publisher = "IEEE COMPUTER SOC",

}

RIS

TY - GEN

T1 - A digital partial built-in self-test structure for a high performance automatic gain control circuit

AU - Lechner, A

AU - Ferguson, J

AU - Richardson, A

AU - Hermes, B

PY - 1999

Y1 - 1999

N2 - It is now widely recognised that Design-for-Testability and Built-in Self-Test techniques rc ill be mandatory to meet test and quality specifications in next generation mired signal integrated systems. This paper describes a new digital on-chip post processing function capable of reducing production test time for a high performance automatic gain control circuit by 70%.

AB - It is now widely recognised that Design-for-Testability and Built-in Self-Test techniques rc ill be mandatory to meet test and quality specifications in next generation mired signal integrated systems. This paper describes a new digital on-chip post processing function capable of reducing production test time for a high performance automatic gain control circuit by 70%.

KW - DESIGN-FOR-TEST

KW - ANALOG

KW - BIST

KW - DAC

KW - ADC

U2 - 10.1109/DATE.1999.761127

DO - 10.1109/DATE.1999.761127

M3 - Conference contribution/Paper

SN - 0-7695-0078-1

SP - 232

EP - 238

BT - DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS

A2 - Borrione, D

A2 - Ernst, R

PB - IEEE COMPUTER SOC

CY - LOS ALAMITOS

ER -