Efficient built-in and external test strategies are becoming essential in microelectromechanical systems (MEMS), especially for high reliability and safety critical applications. To be realistic however, internal and external test must be properly validated in terms of fault coverage. Fault simulation is hence likely to become a critical utility within the design flow. This paper discuss methods for achieving test support based on the extension of tools and techniques currently being introduced into the mixed signal ASIC market.
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