Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter
Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter
}
TY - CHAP
T1 - An approach to realistic fault prediction and layout design for testability in analogue circuits.
AU - Prieto, J.
AU - Richardson, A. M. D.
AU - Rueda, A.
AU - Grout, I.
PY - 1998
Y1 - 1998
M3 - Chapter
SP - 906
EP - 912
BT - Proceedings of the conference on design, automation and test in Europe
CY - Paris
ER -