Home > Research > Publications & Outputs > Correlation of nano-scale electrical and topogr...

Electronic data

  • MMC2017-GAlsharif_abstract

    Accepted author manuscript, 1.1 MB, PDF document

    Available under license: CC BY: Creative Commons Attribution 4.0 International License

View graph of relations

Correlation of nano-scale electrical and topographical mapping of buried nanoscale semiconductor junctions

Research output: Contribution to conference - Without ISBN/ISSN Abstract

Published

Standard

Correlation of nano-scale electrical and topographical mapping of buried nanoscale semiconductor junctions. / Alsharif, Ghazi; Hanel, Linda; Robson, Alexander James; Schultze, J.; Robinson, Benjamin James; Kolosov, Oleg Victor.

2017. Abstract from MMC2017, Manchester, United Kingdom.

Research output: Contribution to conference - Without ISBN/ISSN Abstract

Harvard

APA

Vancouver

Author

Bibtex

@conference{c6c06143d01447e0baef196900fe6e78,
title = "Correlation of nano-scale electrical and topographical mapping of buried nanoscale semiconductor junctions",
abstract = "In recent years, germanium tin (Ge0.9Sn0.1) group-IV semiconductor materials attracted interest as promising candidates for inclusion in optoelectronic devices. They provide a possible route for realising direct-bandgap semiconductors with increasing Sn content [1], potentially allowing to create LED in a non iii-v semiconductor materials. With the continuing demand for miniaturisation in modern electronic devices, there is a linked demand for new characterisation techniques operating in the nanoscale regime.Here we show that by combining an Ar-ion cross-sectioning technique and a customised scanning probe microscopy (SPM), one can extract and explore the electrical properties of the subsurface Ge0.9Sn0.1 structures with a resolution of ~30 nm. This high spatial resolution current mapping is needed to fully understand the nanoscale mechanisms of electrical transport these complexly structured semiconductor nanostructures and assist in the development of new electronic nano-devices. Beam-Exit X-section Polishing (BEXP) [2], Fig. 1 (a), was used to form high quality cross sections of the layered Ge0.9Sn0.1 samples enabling direct access with scanning spreading resistance microscopy (SSRM) electrical mapping. Our SSRM is based on a conventional SPM system (Bruker Multimode with Nanoscope 4a), with a highly-electrically conductive diamond probe and custom probe-signal pre-amplifier and signal access capabilities. The setup enabled the measurements and interpretation of the nanoscale electrical transport properties and mapping of spreading resistance of the subsurface layers under ambient environment conditions.In this paper we report nanoscale measurements on 100 and 200 nm layer of Ge0.9Sn0.1 on the gradient Ge virtual substrates (GeVS) MBE grown on the Si wafer. We obtained SSRM images, as well as captured (I-V) curves with and without illumination.The annealing of the GeVS allowed low density of the defects immediately under the top GeSnx layer. SSRM allowed to observe that subsequent annealing step of the total structure provide notable variation of the conductivity of the GeSnx layer, as well as to uncover the high defect density layer of the GeVS immediately above Si substrate. These were confirmed by the concurrent nanomechanical mapping via ultrasonic force microscopy (UFM). In conclusion, combination of precise sectioning via BEXP and subsequent SSRM imaging that was demonstrated for the first time in this paper, will be a powerful tool for the investigation of the multilayer semiconductor heterostructures.",
keywords = "buried interface, subsurface, SPM, nanoscale electrical characterisation, semiconductors, heterostructures",
author = "Ghazi Alsharif and Linda Hanel and Robson, {Alexander James} and J. Schultze and Robinson, {Benjamin James} and Kolosov, {Oleg Victor}",
year = "2017",
month = jul
day = "3",
language = "English",
note = "MMC2017 : Microscience and Microscopy Congress 2017, mmc2017 ; Conference date: 03-07-2017 Through 06-07-2017",
url = "https://mmc-series.org.uk/conference",

}

RIS

TY - CONF

T1 - Correlation of nano-scale electrical and topographical mapping of buried nanoscale semiconductor junctions

AU - Alsharif, Ghazi

AU - Hanel, Linda

AU - Robson, Alexander James

AU - Schultze, J.

AU - Robinson, Benjamin James

AU - Kolosov, Oleg Victor

PY - 2017/7/3

Y1 - 2017/7/3

N2 - In recent years, germanium tin (Ge0.9Sn0.1) group-IV semiconductor materials attracted interest as promising candidates for inclusion in optoelectronic devices. They provide a possible route for realising direct-bandgap semiconductors with increasing Sn content [1], potentially allowing to create LED in a non iii-v semiconductor materials. With the continuing demand for miniaturisation in modern electronic devices, there is a linked demand for new characterisation techniques operating in the nanoscale regime.Here we show that by combining an Ar-ion cross-sectioning technique and a customised scanning probe microscopy (SPM), one can extract and explore the electrical properties of the subsurface Ge0.9Sn0.1 structures with a resolution of ~30 nm. This high spatial resolution current mapping is needed to fully understand the nanoscale mechanisms of electrical transport these complexly structured semiconductor nanostructures and assist in the development of new electronic nano-devices. Beam-Exit X-section Polishing (BEXP) [2], Fig. 1 (a), was used to form high quality cross sections of the layered Ge0.9Sn0.1 samples enabling direct access with scanning spreading resistance microscopy (SSRM) electrical mapping. Our SSRM is based on a conventional SPM system (Bruker Multimode with Nanoscope 4a), with a highly-electrically conductive diamond probe and custom probe-signal pre-amplifier and signal access capabilities. The setup enabled the measurements and interpretation of the nanoscale electrical transport properties and mapping of spreading resistance of the subsurface layers under ambient environment conditions.In this paper we report nanoscale measurements on 100 and 200 nm layer of Ge0.9Sn0.1 on the gradient Ge virtual substrates (GeVS) MBE grown on the Si wafer. We obtained SSRM images, as well as captured (I-V) curves with and without illumination.The annealing of the GeVS allowed low density of the defects immediately under the top GeSnx layer. SSRM allowed to observe that subsequent annealing step of the total structure provide notable variation of the conductivity of the GeSnx layer, as well as to uncover the high defect density layer of the GeVS immediately above Si substrate. These were confirmed by the concurrent nanomechanical mapping via ultrasonic force microscopy (UFM). In conclusion, combination of precise sectioning via BEXP and subsequent SSRM imaging that was demonstrated for the first time in this paper, will be a powerful tool for the investigation of the multilayer semiconductor heterostructures.

AB - In recent years, germanium tin (Ge0.9Sn0.1) group-IV semiconductor materials attracted interest as promising candidates for inclusion in optoelectronic devices. They provide a possible route for realising direct-bandgap semiconductors with increasing Sn content [1], potentially allowing to create LED in a non iii-v semiconductor materials. With the continuing demand for miniaturisation in modern electronic devices, there is a linked demand for new characterisation techniques operating in the nanoscale regime.Here we show that by combining an Ar-ion cross-sectioning technique and a customised scanning probe microscopy (SPM), one can extract and explore the electrical properties of the subsurface Ge0.9Sn0.1 structures with a resolution of ~30 nm. This high spatial resolution current mapping is needed to fully understand the nanoscale mechanisms of electrical transport these complexly structured semiconductor nanostructures and assist in the development of new electronic nano-devices. Beam-Exit X-section Polishing (BEXP) [2], Fig. 1 (a), was used to form high quality cross sections of the layered Ge0.9Sn0.1 samples enabling direct access with scanning spreading resistance microscopy (SSRM) electrical mapping. Our SSRM is based on a conventional SPM system (Bruker Multimode with Nanoscope 4a), with a highly-electrically conductive diamond probe and custom probe-signal pre-amplifier and signal access capabilities. The setup enabled the measurements and interpretation of the nanoscale electrical transport properties and mapping of spreading resistance of the subsurface layers under ambient environment conditions.In this paper we report nanoscale measurements on 100 and 200 nm layer of Ge0.9Sn0.1 on the gradient Ge virtual substrates (GeVS) MBE grown on the Si wafer. We obtained SSRM images, as well as captured (I-V) curves with and without illumination.The annealing of the GeVS allowed low density of the defects immediately under the top GeSnx layer. SSRM allowed to observe that subsequent annealing step of the total structure provide notable variation of the conductivity of the GeSnx layer, as well as to uncover the high defect density layer of the GeVS immediately above Si substrate. These were confirmed by the concurrent nanomechanical mapping via ultrasonic force microscopy (UFM). In conclusion, combination of precise sectioning via BEXP and subsequent SSRM imaging that was demonstrated for the first time in this paper, will be a powerful tool for the investigation of the multilayer semiconductor heterostructures.

KW - buried interface

KW - subsurface

KW - SPM

KW - nanoscale electrical characterisation

KW - semiconductors

KW - heterostructures

UR - http://mmc-series.org.uk/conference/scientific-programme

M3 - Abstract

T2 - MMC2017

Y2 - 3 July 2017 through 6 July 2017

ER -