Home > Research > Publications & Outputs > Design and self-test for switched-current build...

Associated organisational unit

View graph of relations

Design and self-test for switched-current building blocks

Research output: Contribution to journalJournal article


<mark>Journal publication date</mark>1996
<mark>Journal</mark>IEEE Design and Test of Computers
Issue number2
Number of pages8
Pages (from-to)10-17
<mark>Original language</mark>English


This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to apply, require very little overhead, and result in fault coverage up to 95% for shorts and 60% for open circuits. Analysis reveals that 100% testability may not be achievable in a cost-effective way for mixed-signal circuits.