12,000

We have over 12,000 students, from over 100 countries, within one of the safest campuses in the UK

93%

93% of Lancaster students go into work or further study within six months of graduating

Home > Research > Publications & Outputs > Design and self-test for switched-current build...
View graph of relations

« Back

Design and self-test for switched-current building blocks

Research output: Contribution to journalJournal article

Published

Associated organisational unit

Journal publication date1996
JournalIeee design & test of computers
Journal number2
Volume13
Number of pages8
Pages10-17
Original languageEnglish

Abstract

This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to apply, require very little overhead, and result in fault coverage up to 95% for shorts and 60% for open circuits. Analysis reveals that 100% testability may not be achievable in a cost-effective way for mixed-signal circuits.