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Design and self-test for switched-current building blocks

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Design and self-test for switched-current building blocks. / Olbrich, T ; Richardson, A .
In: IEEE Design and Test of Computers, Vol. 13, No. 2, 1996, p. 10-17.

Research output: Contribution to Journal/MagazineJournal articlepeer-review

Harvard

Olbrich, T & Richardson, A 1996, 'Design and self-test for switched-current building blocks', IEEE Design and Test of Computers, vol. 13, no. 2, pp. 10-17. https://doi.org/10.1109/54.500196

APA

Vancouver

Olbrich T, Richardson A. Design and self-test for switched-current building blocks. IEEE Design and Test of Computers. 1996;13(2):10-17. doi: 10.1109/54.500196

Author

Olbrich, T ; Richardson, A . / Design and self-test for switched-current building blocks. In: IEEE Design and Test of Computers. 1996 ; Vol. 13, No. 2. pp. 10-17.

Bibtex

@article{6050b864b84c4bbf9b77ab60d3901cc5,
title = "Design and self-test for switched-current building blocks",
abstract = "This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to apply, require very little overhead, and result in fault coverage up to 95% for shorts and 60% for open circuits. Analysis reveals that 100% testability may not be achievable in a cost-effective way for mixed-signal circuits.",
author = "T Olbrich and A Richardson",
year = "1996",
doi = "10.1109/54.500196",
language = "English",
volume = "13",
pages = "10--17",
journal = "IEEE Design and Test of Computers",
issn = "0740-7475",
publisher = "IEEE Computer Society",
number = "2",

}

RIS

TY - JOUR

T1 - Design and self-test for switched-current building blocks

AU - Olbrich, T

AU - Richardson, A

PY - 1996

Y1 - 1996

N2 - This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to apply, require very little overhead, and result in fault coverage up to 95% for shorts and 60% for open circuits. Analysis reveals that 100% testability may not be achievable in a cost-effective way for mixed-signal circuits.

AB - This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to apply, require very little overhead, and result in fault coverage up to 95% for shorts and 60% for open circuits. Analysis reveals that 100% testability may not be achievable in a cost-effective way for mixed-signal circuits.

U2 - 10.1109/54.500196

DO - 10.1109/54.500196

M3 - Journal article

VL - 13

SP - 10

EP - 17

JO - IEEE Design and Test of Computers

JF - IEEE Design and Test of Computers

SN - 0740-7475

IS - 2

ER -