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Fast Chase algorithm with an application in turbo decoding.

Research output: Contribution to Journal/MagazineJournal articlepeer-review

Published
<mark>Journal publication date</mark>1/10/2001
<mark>Journal</mark>IEEE Transactions on Communications
Issue number10
Volume49
Number of pages7
Pages (from-to)1693-1699
Publication StatusPublished
<mark>Original language</mark>English

Abstract

Turbo product codes (TPCs) provide an attractive alternative to recursive systematic convolutional (RSC)-based turbo systems. Rather than employ trellis-based decoders, an algebraic decoder may be repeatedly employed in a low-complexity, soft-input/soft-output errors-and-erasures decoder such as the Chase algorithm. Taking motivation from efficient forced erasure decoders, this implementation re-orders the Chase algorithm's repeated decodings such that the inherent computational redundancy is greatly reduced without degrading performance. The result is a highly efficient fast Chase implementation. The algorithm presented here is principally applicable to single error-correcting codes although consideration is also given to the more general case. The new decoder's value in practical turbo schemes is demonstrated via application to decoding of the (64,57,4) extended Hamming TPC

Bibliographic note

This paper describes a modified fast Chase decoding algorithm for product codes. This algorithm allows fast decoding of turbo codes, resulting in a larger number of iterations without additional delay. These results were implemented by Advanced Hardware Architectures Inc in the AHA4850 turbo product decoder chip. RAE_import_type : Journal article RAE_uoa_type : Electrical and Electronic Engineering