Home > Research > Publications & Outputs > Supporting runtime reconfiguration on network p...
View graph of relations

Supporting runtime reconfiguration on network processors

Research output: Contribution in Book/Report/ProceedingsConference contribution

Published
Publication date2006
Host publication20th International Conference on Advanced Information Networking and Applications, 2006 (AINA 2006), Proceedings
Place of PublicationNew York
PublisherIEEE
Pages721-726
Number of pages6
ISBN (Print)0-7695-2466-4
<mark>Original language</mark>English
Event20th International Conference on Advanced Information Networking and Applications - Vienna

Conference

Conference20th International Conference on Advanced Information Networking and Applications
CityVienna
Period18/04/0620/04/06

Conference

Conference20th International Conference on Advanced Information Networking and Applications
CityVienna
Period18/04/0620/04/06

Abstract

Network Processors (NPs) are set to play a key role in the next generation of networking technology. They have the performance of ASIC-based routers whilst offering a high degree of programmability. However, the programmability potential of NPs can only be realised with appropriate software. In this paper we argue that specialised software to support runtime reconfiguration is needed to fully exploit the potential of NPs. We first justify supporting runtime reconfiguration on NPs by offering real-world scenarios and discussing the issues associated with these. We then demonstrate how runtime reconfiguration can be achieved in practice through a case study of our component-based programming approach on the Intel IXP2400 NP.