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The application of neuMOS transistors to enhanced Built-in Self-Test (BIST) and product quality

Research output: Contribution to conferenceConference paper

Published
Publication date18/06/1999
Number of pages5
Pages257-261
<mark>Original language</mark>English

Conference

Conference5th IEEE International Mixed Signal Testing Workshop
CountryCanada
CityWhistler
Period15/06/9918/06/99

Abstract

The neuMOS transistor is a comparatively new device developed in 1991 at Tohoku University, Japan, which is currently showing great promise in the direction of enhanced circuit functionality, particularly in Neural Network applications. In this paper we examine the possibilities of applying the inherent enhanced functionality of the neuMOS transistor to analogue and digital BIST. A novel concept is introduced which can extend existing sw-opamp structures. Finally, potential outgoing quality enhancement in VLSI neuMOS circuits over the CMOS equivalents are considered.