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  • NVRAM simulation AAM

    Accepted author manuscript, 936 KB, PDF document

    Available under license: CC BY: Creative Commons Attribution 4.0 International License

  • Lane IEEE Trans Electron Devices 67 474 (2020)

    Final published version, 1.13 MB, PDF document

    Available under license: CC BY: Creative Commons Attribution 4.0 International License

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Simulations of ultra-low power non-volatile cells for random access memory

Research output: Contribution to journalJournal article

Published
<mark>Journal publication date</mark>1/02/2020
<mark>Journal</mark>IEEE Transactions on Electron Devices
Issue number2
Volume67
Number of pages7
Pages (from-to)474-480
<mark>State</mark>Published
Early online date1/01/20
<mark>Original language</mark>English

Abstract

Dynamic random-access memory (DRAM), which represents 99% of random access memory (RAM), is fast and has excellent endurance, but suffers from disadvantages such as short data retention time (volatility) and loss of data during readout (destructive read). As a consequence, it requires persistent data refreshing, increasing energy consumption, degrading performance and limiting scaling capacity. It is therefore desirable that the next generation of RAM will be non-volatile (NVRAM), low power, high endurance, fast and non-destructively read. Here, we report on a new form of NVRAM: a compound-semiconductor charge-storage memory that exploits quantum phenomena for its operational advantages. Simulations show that the device is extremely low power, with 100 times lower switching energy per unit area than DRAM, but with similar operating speeds. Non-volatility is achieved due to the extraordinary band offsets of InAs and AlSb, providing a large energy barrier (2.1 eV) which prevents the escape of electrons. Based on the simulation results, an NVRAM architecture is proposed for which extremely low disturb-rates are predicted as a result of the quantum-mechanical resonant-tunnelling mechanism used to write and erase.