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  • Lane IEEE Trans Electron Devices 67 474 (2020)

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Simulations of ultra-low power non-volatile cells for random access memory

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Simulations of ultra-low power non-volatile cells for random access memory. / Lane, Dominic; Hayne, Manus.
In: IEEE Transactions on Electron Devices, Vol. 67, No. 2, 01.02.2020, p. 474-480.

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Lane D, Hayne M. Simulations of ultra-low power non-volatile cells for random access memory. IEEE Transactions on Electron Devices. 2020 Feb 1;67(2):474-480. Epub 2020 Jan 1. doi: 10.1109/TED.2019.2957037

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Lane, Dominic ; Hayne, Manus. / Simulations of ultra-low power non-volatile cells for random access memory. In: IEEE Transactions on Electron Devices. 2020 ; Vol. 67, No. 2. pp. 474-480.

Bibtex

@article{0272811cc9894bcdb86e63678fe9e2c4,
title = "Simulations of ultra-low power non-volatile cells for random access memory",
abstract = "Dynamic random-access memory (DRAM), which represents 99% of random access memory (RAM), is fast and has excellent endurance, but suffers from disadvantages such as short data retention time (volatility) and loss of data during readout (destructive read). As a consequence, it requires persistent data refreshing, increasing energy consumption, degrading performance and limiting scaling capacity. It is therefore desirable that the next generation of RAM will be non-volatile (NVRAM), low power, high endurance, fast and non-destructively read. Here, we report on a new form of NVRAM: a compound-semiconductor charge-storage memory that exploits quantum phenomena for its operational advantages. Simulations show that the device is extremely low power, with 100 times lower switching energy per unit area than DRAM, but with similar operating speeds. Non-volatility is achieved due to the extraordinary band offsets of InAs and AlSb, providing a large energy barrier (2.1 eV) which prevents the escape of electrons. Based on the simulation results, an NVRAM architecture is proposed for which extremely low disturb-rates are predicted as a result of the quantum-mechanical resonant-tunnelling mechanism used to write and erase.",
author = "Dominic Lane and Manus Hayne",
year = "2020",
month = feb,
day = "1",
doi = "10.1109/TED.2019.2957037",
language = "English",
volume = "67",
pages = "474--480",
journal = "IEEE Transactions on Electron Devices",
issn = "0018-9383",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "2",

}

RIS

TY - JOUR

T1 - Simulations of ultra-low power non-volatile cells for random access memory

AU - Lane, Dominic

AU - Hayne, Manus

PY - 2020/2/1

Y1 - 2020/2/1

N2 - Dynamic random-access memory (DRAM), which represents 99% of random access memory (RAM), is fast and has excellent endurance, but suffers from disadvantages such as short data retention time (volatility) and loss of data during readout (destructive read). As a consequence, it requires persistent data refreshing, increasing energy consumption, degrading performance and limiting scaling capacity. It is therefore desirable that the next generation of RAM will be non-volatile (NVRAM), low power, high endurance, fast and non-destructively read. Here, we report on a new form of NVRAM: a compound-semiconductor charge-storage memory that exploits quantum phenomena for its operational advantages. Simulations show that the device is extremely low power, with 100 times lower switching energy per unit area than DRAM, but with similar operating speeds. Non-volatility is achieved due to the extraordinary band offsets of InAs and AlSb, providing a large energy barrier (2.1 eV) which prevents the escape of electrons. Based on the simulation results, an NVRAM architecture is proposed for which extremely low disturb-rates are predicted as a result of the quantum-mechanical resonant-tunnelling mechanism used to write and erase.

AB - Dynamic random-access memory (DRAM), which represents 99% of random access memory (RAM), is fast and has excellent endurance, but suffers from disadvantages such as short data retention time (volatility) and loss of data during readout (destructive read). As a consequence, it requires persistent data refreshing, increasing energy consumption, degrading performance and limiting scaling capacity. It is therefore desirable that the next generation of RAM will be non-volatile (NVRAM), low power, high endurance, fast and non-destructively read. Here, we report on a new form of NVRAM: a compound-semiconductor charge-storage memory that exploits quantum phenomena for its operational advantages. Simulations show that the device is extremely low power, with 100 times lower switching energy per unit area than DRAM, but with similar operating speeds. Non-volatility is achieved due to the extraordinary band offsets of InAs and AlSb, providing a large energy barrier (2.1 eV) which prevents the escape of electrons. Based on the simulation results, an NVRAM architecture is proposed for which extremely low disturb-rates are predicted as a result of the quantum-mechanical resonant-tunnelling mechanism used to write and erase.

U2 - 10.1109/TED.2019.2957037

DO - 10.1109/TED.2019.2957037

M3 - Journal article

VL - 67

SP - 474

EP - 480

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

SN - 0018-9383

IS - 2

ER -