Home > Research > Publications & Outputs > Understanding the effect of confinement in scan...

Electronic data

  • JAP20-AR-02304

    Rights statement: Rights statement: Copyright 2020 American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. This article appeared in Journal of Applied Physics, 128 (3), 2020 and may be found at https://aip.scitation.org/doi/10.1063/5.0011703

    Accepted author manuscript, 1.98 MB, PDF document

    Available under license: CC BY: Creative Commons Attribution 4.0 International License

Links

Text available via DOI:

View graph of relations

Understanding the effect of confinement in scanning spreading resistance microscopy measurements

Research output: Contribution to journalJournal article

Published
Close
Article number034303
<mark>Journal publication date</mark>21/07/2020
<mark>Journal</mark>Journal of Applied Physics
Issue number3
Volume128
Number of pages11
Publication StatusPublished
Early online date16/07/20
<mark>Original language</mark>English

Abstract

Scanning spreading resistance microscopy (SSRM) is a powerful technique for quantitative two-and three-dimensional carrier profiling of semiconductor devices with sub-nm spatial resolution. However, considering the sub-10 nm dimensions of advanced devices and the introduction of three-dimensional architectures like fin field effect transistor (FinFET) and nanowires, the measured spreading resistance is easily impacted by parasitic series resistances present in the system. The limited amount of material, the presence of multiple interfaces, and confined current paths may increase the total resistance measured by SSRM beyond the expected spreading resistance, which can ultimately lead to an inaccurate carrier quantification. Here, we report a simulation assisted experimental study to identify the different parameters affecting the SSRM measurements in confined volumes. Experimentally, the two-dimensional current confinement is obtained by progressively thinning down uniformly doped blanket silicon on insulator wafers using scalpel SSRM. The concomitant SSRM provides detailed electrical information as a function of depth up to oxide interface. We show that the resistance is most affected by the interface traps in case of a heterogeneous sample, followed by the intrinsic resistance of the current carrying paths. Furthermore, we show that accurate carrier quantification is ensured for typical back contact distances of 1 μm if the region of interest is at least nine times larger than the probe radius. © 2020 Author(s).