Results for VHDL

Publications & Outputs

1. Area-efficient high-speed 3D DWT processor architecture

   Jiang, M. & Crookes, D., 26/04/2007, In: Electronics Letters. 43, 9, p. 502-503 2 p.

   Research output: Contribution to Journal/Magazine › Journal article › peer-review

2. High-performance 3D median filter architecture for medical image despeckling

   Jiang, M. & Crookes, D., 23/11/2006, In: Electronics Letters. 42, 24, p. 1379-1381 3 p.

   Research output: Contribution to Journal/Magazine › Journal article › peer-review