My current research focus is on III-V compound semiconductor logic devices to enable scaling of ULTRARAM™ universal memory cells up to 1Mbit arrays. The logic devices in question are a unique patent pending design which is unlike conventional CMOS. We exploit a single charge carrier for both "p-type" and "n-type" equivalent operations with the goal of obtaining the benefits of the III-V system (e.g. high charge mobility) without the drawbacks (such as the contrast between hole and electron mobility).

This project is partnered with the Material Social Futures (part of the Materials Science Institute), through which I am being trained to explore the intersection of the material and social. Delving into such things as the societal impact of technology, raw material extraction and global inequality.