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A fault simulation methodology for MEMS.

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A fault simulation methodology for MEMS. / Rosing, R.; Richardson, A. M. D.; Dorey, A. P.
Proceedings of the design automation and test in Europe conference. Paris: IEEE, 2000. p. 476-483.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter

Harvard

Rosing, R, Richardson, AMD & Dorey, AP 2000, A fault simulation methodology for MEMS. in Proceedings of the design automation and test in Europe conference. IEEE, Paris, pp. 476-483. https://doi.org/10.1109/DATE.2000.840828

APA

Rosing, R., Richardson, A. M. D., & Dorey, A. P. (2000). A fault simulation methodology for MEMS. In Proceedings of the design automation and test in Europe conference (pp. 476-483). IEEE. https://doi.org/10.1109/DATE.2000.840828

Vancouver

Rosing R, Richardson AMD, Dorey AP. A fault simulation methodology for MEMS. In Proceedings of the design automation and test in Europe conference. Paris: IEEE. 2000. p. 476-483 doi: 10.1109/DATE.2000.840828

Author

Rosing, R. ; Richardson, A. M. D. ; Dorey, A. P. / A fault simulation methodology for MEMS. Proceedings of the design automation and test in Europe conference. Paris : IEEE, 2000. pp. 476-483

Bibtex

@inbook{63a2eb77e6d341d5ac2c24a4ca43d752,
title = "A fault simulation methodology for MEMS.",
abstract = "Efficient built-in and external test strategies are becoming essential in microelectromechanical systems (MEMS), especially for high reliability and safety critical applications. To be realistic however, internal and external test must be properly validated in terms of fault coverage. Fault simulation is hence likely to become a critical utility within the design flow. This paper discuss methods for achieving test support based on the extension of tools and techniques currently being introduced into the mixed signal ASIC market.",
author = "R. Rosing and Richardson, {A. M. D.} and Dorey, {A. P.}",
note = "{\textcopyright}2000 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.{"} {"}This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.",
year = "2000",
doi = "10.1109/DATE.2000.840828",
language = "English",
isbn = "0-7695-0537-6.",
pages = "476--483",
booktitle = "Proceedings of the design automation and test in Europe conference",
publisher = "IEEE",

}

RIS

TY - CHAP

T1 - A fault simulation methodology for MEMS.

AU - Rosing, R.

AU - Richardson, A. M. D.

AU - Dorey, A. P.

N1 - ©2000 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE." "This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.

PY - 2000

Y1 - 2000

N2 - Efficient built-in and external test strategies are becoming essential in microelectromechanical systems (MEMS), especially for high reliability and safety critical applications. To be realistic however, internal and external test must be properly validated in terms of fault coverage. Fault simulation is hence likely to become a critical utility within the design flow. This paper discuss methods for achieving test support based on the extension of tools and techniques currently being introduced into the mixed signal ASIC market.

AB - Efficient built-in and external test strategies are becoming essential in microelectromechanical systems (MEMS), especially for high reliability and safety critical applications. To be realistic however, internal and external test must be properly validated in terms of fault coverage. Fault simulation is hence likely to become a critical utility within the design flow. This paper discuss methods for achieving test support based on the extension of tools and techniques currently being introduced into the mixed signal ASIC market.

U2 - 10.1109/DATE.2000.840828

DO - 10.1109/DATE.2000.840828

M3 - Chapter

SN - 0-7695-0537-6.

SP - 476

EP - 483

BT - Proceedings of the design automation and test in Europe conference

PB - IEEE

CY - Paris

ER -