This study describes a novel approach to design of a power factor correction (PFC) and total harmonic distortion (THD) reduction-based brushless DC (BLDC) motor drive. The drive was designed to obtain a reduced THD for PFC. The basic design of the BLDC motor drive contains an AC voltage source as input for a diode bridge rectifier. The output DC voltage is filtered out to reduce ripples. The smooth DC output voltage is supplied to the modified Zeta converter. The output voltage of the modified Zeta converter is controlled by using pulse width modulation (PWM). The modified Zeta converter is utilized in discontinuous inductor current mode (DICM) for better power factor. This controlled DC voltage is supplied to the voltage source inverter (VSI) as input. The VSI is designed to convert input DC into a suitable AC voltage source. The output voltage of the VSI depends upon switching patterns applied to power transistors generated by space vector PWM. Additionally, the output of the VSI is supplied to the BLDC motor for speed control. The main purpose of this paper is to simulate and assess BLDC motor function via the MATLAB/Simulink environment, using SimPowerSystems and the Simscape toolbox, with the goals of improved power factor, lower THD, and better speed control. The PFC modified Zeta converter topology produced the best power factor, currently 0.981, which is better than other topologies, with a THD of only 9.81%, the lowest of all three topologies, which demonstrates the significance of the proposed model.