We demonstrate a high yield production scheme to fabricate sub-5 nm co-planar metal–insulator–metal junctions. This involves determining the relationship between the actual gap between the metallic junctions for a given designed gap, and the use of weak developers with ultrasonic agitation to process the exposed resist. This results in an improved process to achieve narrow inter-electrode gaps. The gaps were imaged using an AFM equipped with a carbon nanotube tip to achieve a high degree of accuracy in measurement. The smallest gap unambiguously measured was ~ 2 nm. Gaps with ≤ 5 nm spacing were produced with a very high yield of about 75% for a designed inter-electrode distance of 0 nm. The leakage resistance of the gaps was found to be of the order of 1012 Ω. The entire junction structure was designed to be co-planar to better than 1 nm over 1 μ m2.
The first publication originating from an Anglo/French project that designed flat (embedded) electrical contacts for molecular electronics. Fabrication challenges such as the electrodes separation, metal granularity and electrode flatness were addressed and optimized to reach the minimum electrode gap of smaller than 5 nanometres. This was the smallest gap made by this fabrication route at the time. RAE_import_type : Journal article RAE_uoa_type : General Engineering