Recent developments in Application Specific Integrated Circuits (ASICs), which contain analogue as well as digital components on-chip, has meant an upsurge of interest in the problems of testing. Much successful research has already been carried out in fault-testing digital ICs, but although several methods of analogue testing are being tried, no one coherent philosophy has yet been agreed upon. This paper contrasts and reports on currently favoured analogue testing methodologies, and includes a discussion, with reference to recent work undertaken by the authors, of the applicability of the power supply current monitoring technique.