Final published version
Research output: Contribution to Journal/Magazine › Journal article › peer-review
Research output: Contribution to Journal/Magazine › Journal article › peer-review
}
TY - JOUR
T1 - An optimization based design for integrated dependable real-time embedded systems
AU - Islam, S.
AU - Suri, Neeraj
AU - Balogh, A.
AU - Csertán, G.
AU - Pataricza, A.
PY - 2009
Y1 - 2009
N2 - Moving from the traditional federated design paradigm, integration of mixed-criticality software components onto common computing platforms is increasingly being adopted by automotive, avionics and the control industry. This method faces new challenges such as the integration of varied functionalities (dependability, responsiveness, power consumption, etc.) under platform resource constraints and the prevention of error propagation. Based on model driven architecture and platform based design's principles, we present a systematic mapping process for such integration adhering a transformation based design methodology. Our aim is to convert/transform initial platform independent application specifications into post integration platform specific models. In this paper, a heuristic based resource allocation approach is depicted for the consolidated mapping of safety critical and non-safety critical applications onto a common computing platform meeting particularly dependability/fault- tolerance and real-time requirements. We develop a supporting tool suite for the proposed framework, where VIATRA (VIsual Automated model TRAnsformations) is used as a transformation tool at different design steps. We validate the process and provide experimental results to show the effectiveness, performance and robustness of the approach. © Springer Science+Business Media, LLC 2009.
AB - Moving from the traditional federated design paradigm, integration of mixed-criticality software components onto common computing platforms is increasingly being adopted by automotive, avionics and the control industry. This method faces new challenges such as the integration of varied functionalities (dependability, responsiveness, power consumption, etc.) under platform resource constraints and the prevention of error propagation. Based on model driven architecture and platform based design's principles, we present a systematic mapping process for such integration adhering a transformation based design methodology. Our aim is to convert/transform initial platform independent application specifications into post integration platform specific models. In this paper, a heuristic based resource allocation approach is depicted for the consolidated mapping of safety critical and non-safety critical applications onto a common computing platform meeting particularly dependability/fault- tolerance and real-time requirements. We develop a supporting tool suite for the proposed framework, where VIATRA (VIsual Automated model TRAnsformations) is used as a transformation tool at different design steps. We validate the process and provide experimental results to show the effectiveness, performance and robustness of the approach. © Springer Science+Business Media, LLC 2009.
KW - Constraints
KW - Fault-tolerance
KW - Mapping
KW - Real-time
KW - Transformation
KW - Computing platform
KW - Design Methodology
KW - Design paradigm
KW - Design steps
KW - Error propagation
KW - Model driven architectures
KW - Model transformation
KW - Platform based design
KW - Platform independent
KW - Post-integration
KW - Power Consumption
KW - Real time requirement
KW - Real-time embedded systems
KW - Resource Constraint
KW - Safety critical applications
KW - Safety-critical
KW - Software component
KW - Supporting tool
KW - Systematic mapping
KW - Transformation based
KW - Transformation tools
KW - Computer science
KW - Design
KW - Embedded systems
KW - Fault tolerance
KW - Quality assurance
KW - Resource allocation
KW - Real time systems
U2 - 10.1007/s10617-009-9041-7
DO - 10.1007/s10617-009-9041-7
M3 - Journal article
VL - 13
SP - 245
EP - 285
JO - Design Automation for Embedded Systems
JF - Design Automation for Embedded Systems
SN - 0929-5585
IS - 4
ER -