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BDG-torus union graph-an efficient algorithmically specialized parallel interconnect

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BDG-torus union graph-an efficient algorithmically specialized parallel interconnect. / Suri, Neeraj; Mendelson, Avi; Pradhan, Dhiraj K.
Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing. IEEE, 1991.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Conference contribution/Paper › peer-review

Harvard

Suri, N, Mendelson, A & Pradhan, DK 1991, BDG-torus union graph-an efficient algorithmically specialized parallel interconnect. in Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing. IEEE. https://doi.org/10.1109/SPDP.1991.218212

APA

Suri, N., Mendelson, A., & Pradhan, D. K. (1991). BDG-torus union graph-an efficient algorithmically specialized parallel interconnect. In Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing IEEE. https://doi.org/10.1109/SPDP.1991.218212

Vancouver

Suri N, Mendelson A, Pradhan DK. BDG-torus union graph-an efficient algorithmically specialized parallel interconnect. In Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing. IEEE. 1991 doi: 10.1109/SPDP.1991.218212

Author

Suri, Neeraj ; Mendelson, Avi ; Pradhan, Dhiraj K. / BDG-torus union graph-an efficient algorithmically specialized parallel interconnect. Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing. IEEE, 1991.

Bibtex

@inproceedings{469524f35a9544f5a70ddd5847c66954,
title = "BDG-torus union graph-an efficient algorithmically specialized parallel interconnect",
abstract = "The binary de Bruijn graph (BDG) is a realizable alternative to the hypercube. An extension of the BDG by the edge set union with a torus is shown-union-graph (UG). This achieves graph capabilities/versatility comparable to the product shuffle (PS) graph and the hypercube within a fixed degree graph. The UG improves upon both in implementing pipelined and multi-phase algorithms. More importantly, the purpose being to design an algorithmically specialized interconnect, with the algorithmic features of a wide range of algorithms as well as direct architectural support for them, instead of simple providing for a set of graph embeddings in the interconnect. A set of examples demonstrate the UG's versatility in this aspect of algorithmic support.",
author = "Neeraj Suri and Avi Mendelson and Pradhan, {Dhiraj K.}",
year = "1991",
month = dec,
day = "2",
doi = "10.1109/SPDP.1991.218212",
language = "English",
isbn = "0818623101",
booktitle = "Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing",
publisher = "IEEE",

}

RIS

TY - GEN

T1 - BDG-torus union graph-an efficient algorithmically specialized parallel interconnect

AU - Suri, Neeraj

AU - Mendelson, Avi

AU - Pradhan, Dhiraj K.

PY - 1991/12/2

Y1 - 1991/12/2

N2 - The binary de Bruijn graph (BDG) is a realizable alternative to the hypercube. An extension of the BDG by the edge set union with a torus is shown-union-graph (UG). This achieves graph capabilities/versatility comparable to the product shuffle (PS) graph and the hypercube within a fixed degree graph. The UG improves upon both in implementing pipelined and multi-phase algorithms. More importantly, the purpose being to design an algorithmically specialized interconnect, with the algorithmic features of a wide range of algorithms as well as direct architectural support for them, instead of simple providing for a set of graph embeddings in the interconnect. A set of examples demonstrate the UG's versatility in this aspect of algorithmic support.

AB - The binary de Bruijn graph (BDG) is a realizable alternative to the hypercube. An extension of the BDG by the edge set union with a torus is shown-union-graph (UG). This achieves graph capabilities/versatility comparable to the product shuffle (PS) graph and the hypercube within a fixed degree graph. The UG improves upon both in implementing pipelined and multi-phase algorithms. More importantly, the purpose being to design an algorithmically specialized interconnect, with the algorithmic features of a wide range of algorithms as well as direct architectural support for them, instead of simple providing for a set of graph embeddings in the interconnect. A set of examples demonstrate the UG's versatility in this aspect of algorithmic support.

U2 - 10.1109/SPDP.1991.218212

DO - 10.1109/SPDP.1991.218212

M3 - Conference contribution/Paper

SN - 0818623101

BT - Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing

PB - IEEE

ER -