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Design, implementation and applications of low-complexity LDPC codes

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Abstract

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Design, implementation and applications of low-complexity LDPC codes. / Honary, Bahram; Momahed Heravi, Behzad; Kariyawasam Katukolihe Ga, Sharadha et al.
2nd International Conference on Signal Processing and Telecommunication Systems, ICSPCS'2008. Gold Coast, Australia: IEEE, 2008.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Abstract

Harvard

Honary, B, Momahed Heravi, B, Kariyawasam Katukolihe Ga, S & Pandya, N 2008, Design, implementation and applications of low-complexity LDPC codes. in 2nd International Conference on Signal Processing and Telecommunication Systems, ICSPCS'2008. IEEE, Gold Coast, Australia. https://doi.org/10.1109/ICSPCS.2008.4813651

APA

Honary, B., Momahed Heravi, B., Kariyawasam Katukolihe Ga, S., & Pandya, N. (2008). Design, implementation and applications of low-complexity LDPC codes. In 2nd International Conference on Signal Processing and Telecommunication Systems, ICSPCS'2008 IEEE. https://doi.org/10.1109/ICSPCS.2008.4813651

Vancouver

Honary B, Momahed Heravi B, Kariyawasam Katukolihe Ga S, Pandya N. Design, implementation and applications of low-complexity LDPC codes. In 2nd International Conference on Signal Processing and Telecommunication Systems, ICSPCS'2008. Gold Coast, Australia: IEEE. 2008 doi: 10.1109/ICSPCS.2008.4813651

Author

Honary, Bahram ; Momahed Heravi, Behzad ; Kariyawasam Katukolihe Ga, Sharadha et al. / Design, implementation and applications of low-complexity LDPC codes. 2nd International Conference on Signal Processing and Telecommunication Systems, ICSPCS'2008. Gold Coast, Australia : IEEE, 2008.

Bibtex

@inbook{9fde28bd2bda461aa8157f04133ff24f,
title = "Design, implementation and applications of low-complexity LDPC codes",
abstract = "Structured LDPC codes enable low-complexity decoding as well as efficient implementation of encoder reducing the complexity down to the order of the number of parity-check bits. Construction of structured LDPC codes is based on combinatorial approaches such as balanced-incomplete block-design (BIBD) and finite fields to design quasi-cyclic LDPC (QC-LDPC) codes. Well designed QC-LDPC codes can perform as well as randomly constructed LDPC codes with iterative decoding based on belief propagation in terms of bit-error probability. It has been shown that QC-LDPC codes can achieve lower error floor than randomly constructed LDPC codes. Within this work, the design of quasi-cyclic LDPC codes for a range of practical applications is discussed which includes construction of variable-rate large-block-length LDPC codes for DVB-S2 and DVB-T2 applications and adaptive short-block-length LDPC codes for HF applications. Moreover, efficient implementation of QC-LDPC decoder/encoder for FPGA devices which reduces memory requirements is presented.",
author = "Bahram Honary and {Momahed Heravi}, Behzad and {Kariyawasam Katukolihe Ga}, Sharadha and Nishit Pandya",
year = "2008",
month = dec,
doi = "10.1109/ICSPCS.2008.4813651",
language = "English",
isbn = "978-1-4244-4243-0",
booktitle = "2nd International Conference on Signal Processing and Telecommunication Systems, ICSPCS'2008",
publisher = "IEEE",

}

RIS

TY - CHAP

T1 - Design, implementation and applications of low-complexity LDPC codes

AU - Honary, Bahram

AU - Momahed Heravi, Behzad

AU - Kariyawasam Katukolihe Ga, Sharadha

AU - Pandya, Nishit

PY - 2008/12

Y1 - 2008/12

N2 - Structured LDPC codes enable low-complexity decoding as well as efficient implementation of encoder reducing the complexity down to the order of the number of parity-check bits. Construction of structured LDPC codes is based on combinatorial approaches such as balanced-incomplete block-design (BIBD) and finite fields to design quasi-cyclic LDPC (QC-LDPC) codes. Well designed QC-LDPC codes can perform as well as randomly constructed LDPC codes with iterative decoding based on belief propagation in terms of bit-error probability. It has been shown that QC-LDPC codes can achieve lower error floor than randomly constructed LDPC codes. Within this work, the design of quasi-cyclic LDPC codes for a range of practical applications is discussed which includes construction of variable-rate large-block-length LDPC codes for DVB-S2 and DVB-T2 applications and adaptive short-block-length LDPC codes for HF applications. Moreover, efficient implementation of QC-LDPC decoder/encoder for FPGA devices which reduces memory requirements is presented.

AB - Structured LDPC codes enable low-complexity decoding as well as efficient implementation of encoder reducing the complexity down to the order of the number of parity-check bits. Construction of structured LDPC codes is based on combinatorial approaches such as balanced-incomplete block-design (BIBD) and finite fields to design quasi-cyclic LDPC (QC-LDPC) codes. Well designed QC-LDPC codes can perform as well as randomly constructed LDPC codes with iterative decoding based on belief propagation in terms of bit-error probability. It has been shown that QC-LDPC codes can achieve lower error floor than randomly constructed LDPC codes. Within this work, the design of quasi-cyclic LDPC codes for a range of practical applications is discussed which includes construction of variable-rate large-block-length LDPC codes for DVB-S2 and DVB-T2 applications and adaptive short-block-length LDPC codes for HF applications. Moreover, efficient implementation of QC-LDPC decoder/encoder for FPGA devices which reduces memory requirements is presented.

U2 - 10.1109/ICSPCS.2008.4813651

DO - 10.1109/ICSPCS.2008.4813651

M3 - Abstract

SN - 978-1-4244-4243-0

BT - 2nd International Conference on Signal Processing and Telecommunication Systems, ICSPCS'2008

PB - IEEE

CY - Gold Coast, Australia

ER -