Home > Research > Publications & Outputs > Many-Core Real-Time Network-on-Chip I/O Systems...

Links

Text available via DOI:

View graph of relations

Many-Core Real-Time Network-on-Chip I/O Systems for Reducing Contention and Enhancing Predictability

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNConference contribution/Paperpeer-review

Published
  • Zhe Jiang
  • Xiaotian Dai
  • Shuai Zhao
  • Ran Wei
  • Ian Gray
Close
Publication date9/05/2023
Host publicationCPS-IoT Week '23: Proceedings of Cyber-Physical Systems and Internet of Things Week 2023eek 2023
Place of PublicationNew York
PublisherACM
Pages227-233
Number of pages7
ISBN (electronic)9798400700491
<mark>Original language</mark>English

Abstract

In safety-critical and high-integrity computing, it is important to guarantee both performance and time-predictability of I/O operations. However, with the continued growth of hardware and architectural complexity, satisfying such real-time requirements has become increasingly challenging because of complex I/O transaction paths and extensive hardware contention. This paper proposes a systematic framework with a novel I/O controller and a reconfigurable NoC, effectively optimising I/O transaction paths to encounter reduced contention. Moreover, we present a theoretical model and optimisation process to further improve real-time performance. The evaluations show that our approach outperforms state-of-the-art I/O processing techniques on a range of metrics.