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Modelling and analysis of interconnects for deep submicron systems-on-chip.

Research output: Book/Report/Proceedings › Book

Published

Standard

Modelling and analysis of interconnects for deep submicron systems-on-chip. / Pamunuwa, Dinesh B.
Stockholm: Royal Institute of Technology, 2003.

Research output: Book/Report/Proceedings › Book

Harvard

Pamunuwa, DB 2003, Modelling and analysis of interconnects for deep submicron systems-on-chip. Royal Institute of Technology, Stockholm.

APA

Pamunuwa, D. B. (2003). Modelling and analysis of interconnects for deep submicron systems-on-chip. Royal Institute of Technology.

Vancouver

Pamunuwa DB. Modelling and analysis of interconnects for deep submicron systems-on-chip. Stockholm: Royal Institute of Technology, 2003.

Author

Pamunuwa, Dinesh B. / Modelling and analysis of interconnects for deep submicron systems-on-chip. Stockholm : Royal Institute of Technology, 2003.

Bibtex

@book{862604c2212b4f4fb71f96518431cd0e,
title = "Modelling and analysis of interconnects for deep submicron systems-on-chip.",
author = "Pamunuwa, {Dinesh B.}",
year = "2003",
language = "English",
isbn = "91-7283-631-8",
publisher = "Royal Institute of Technology",

}

RIS

TY - BOOK

T1 - Modelling and analysis of interconnects for deep submicron systems-on-chip.

AU - Pamunuwa, Dinesh B.

PY - 2003

Y1 - 2003

M3 - Book

SN - 91-7283-631-8

BT - Modelling and analysis of interconnects for deep submicron systems-on-chip.

PB - Royal Institute of Technology

CY - Stockholm

ER -