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On the use of formal techniques for validation

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On the use of formal techniques for validation. / Suri, N.; Sinha, P.
Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing . IEEE, 1998. p. 1-10.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNConference contribution/Paperpeer-review

Harvard

Suri, N & Sinha, P 1998, On the use of formal techniques for validation. in Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing . IEEE, pp. 1-10. https://doi.org/10.1109/FTCS.1998.689490

APA

Suri, N., & Sinha, P. (1998). On the use of formal techniques for validation. In Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing (pp. 1-10). IEEE. https://doi.org/10.1109/FTCS.1998.689490

Vancouver

Suri N, Sinha P. On the use of formal techniques for validation. In Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing . IEEE. 1998. p. 1-10 doi: 10.1109/FTCS.1998.689490

Author

Suri, N. ; Sinha, P. / On the use of formal techniques for validation. Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing . IEEE, 1998. pp. 1-10

Bibtex

@inproceedings{69a9bb77ddba45d087fc2ec9e5788ae2,
title = "On the use of formal techniques for validation",
abstract = "The traditional use of formal methods has been for the verification of algorithms or protocols. Given the high cost and limitations in state space coverage provided by conventional validation techniques, we introduce a novel approach to utilize formal verification procedures to drive fault injection based validation of dependable protocols. The paper develops graph structures for representation of information generated through formal processes, as well as a formal framework that facilitates the formulation of specific fault injection experiments for validation. {\textcopyright} 1998 IEEE. All rights reserved.",
keywords = "Fault tolerance, Formal verification, Software testing, Fault injection, Formal framework, Formal techniques, Formal verification procedures, Graph structures, High costs, Formal methods",
author = "N. Suri and P. Sinha",
year = "1998",
doi = "10.1109/FTCS.1998.689490",
language = "English",
isbn = "0818684704",
pages = "1--10",
booktitle = "Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing",
publisher = "IEEE",

}

RIS

TY - GEN

T1 - On the use of formal techniques for validation

AU - Suri, N.

AU - Sinha, P.

PY - 1998

Y1 - 1998

N2 - The traditional use of formal methods has been for the verification of algorithms or protocols. Given the high cost and limitations in state space coverage provided by conventional validation techniques, we introduce a novel approach to utilize formal verification procedures to drive fault injection based validation of dependable protocols. The paper develops graph structures for representation of information generated through formal processes, as well as a formal framework that facilitates the formulation of specific fault injection experiments for validation. © 1998 IEEE. All rights reserved.

AB - The traditional use of formal methods has been for the verification of algorithms or protocols. Given the high cost and limitations in state space coverage provided by conventional validation techniques, we introduce a novel approach to utilize formal verification procedures to drive fault injection based validation of dependable protocols. The paper develops graph structures for representation of information generated through formal processes, as well as a formal framework that facilitates the formulation of specific fault injection experiments for validation. © 1998 IEEE. All rights reserved.

KW - Fault tolerance

KW - Formal verification

KW - Software testing

KW - Fault injection

KW - Formal framework

KW - Formal techniques

KW - Formal verification procedures

KW - Graph structures

KW - High costs

KW - Formal methods

U2 - 10.1109/FTCS.1998.689490

DO - 10.1109/FTCS.1998.689490

M3 - Conference contribution/Paper

SN - 0818684704

SP - 1

EP - 10

BT - Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing

PB - IEEE

ER -