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Reconfigurable circuits for fault tolerant systems: factors to consider

Research output: Contribution to conference - Without ISBN/ISSN Conference paperpeer-review

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Publication date21/06/2002
Number of pages4
Pages215-218
<mark>Original language</mark>English
Event8th IEEE Internationa Mixed Signal Testing Workshop - Montreux, Switzerland
Duration: 18/06/200221/06/2002

Workshop

Workshop8th IEEE Internationa Mixed Signal Testing Workshop
Country/TerritorySwitzerland
CityMontreux
Period18/06/0221/06/02

Abstract

In safety critical applications of advanced mixed signal technology, such as in automotive systems, the concept of zero-failure may be implemented by integrating failure management functions based on self-test, online monitoring, failure diagnostic and failure mode compensation in parallel with highly robust design style and packaging technology. Here the primary objectives of
advanced test techniques are the detection of conditions which may lead to systems failure, and the initiation of appropriate action to ensure safety while maintaining system performance.
Traditionally, redundant systems for fault tolerance are used in safety critical applications, such as nuclear power stations and aerospace. These systems are not economical for the majority of next generation safety critical and high
reliability applications as it is impractical to implement entire redundant subsystems. Automotive systems need to be produced cheaply and achieve high reliability. In failsafe systems additional circuitry will be required, the extent of which will depend on the architecture of the system and knowledge of the failure effects.
In the event of a potential failure, some kind of backup method has to be provided to ensure a certain reduced system functionality without complete system breakdown.
In the majority of cases this may be achieved through circuit reconfiguration.
This paper identifies the factors involved in designing reconfigurable circuits and systems. Some initial ideas are presented for a typical sensor interface circuit including potential reconfiguration and failure mode compensation techniques which may be capable of achieving improved system fault tolerance.