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Roll-forward recovery: the bidirectional cache approach

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNConference contribution/Paperpeer-review

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Roll-forward recovery: the bidirectional cache approach. / Mendelson, A.; Suri, Neeraj; Zimmerman, O.
Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems. IEEE, 1996. p. 59-68.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNConference contribution/Paperpeer-review

Harvard

Mendelson, A, Suri, N & Zimmerman, O 1996, Roll-forward recovery: the bidirectional cache approach. in Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems. IEEE, pp. 59-68, IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, College Station, Texas, United States, 12/06/96. https://doi.org/10.1109/FTPDS.1994.494475

APA

Mendelson, A., Suri, N., & Zimmerman, O. (1996). Roll-forward recovery: the bidirectional cache approach. In Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems (pp. 59-68). IEEE. https://doi.org/10.1109/FTPDS.1994.494475

Vancouver

Mendelson A, Suri N, Zimmerman O. Roll-forward recovery: the bidirectional cache approach. In Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems. IEEE. 1996. p. 59-68 doi: 10.1109/FTPDS.1994.494475

Author

Mendelson, A. ; Suri, Neeraj ; Zimmerman, O. / Roll-forward recovery : the bidirectional cache approach. Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems. IEEE, 1996. pp. 59-68

Bibtex

@inproceedings{9d55ca07e0ce40d1880085d2fcddd8aa,
title = "Roll-forward recovery: the bidirectional cache approach",
abstract = "A split-cache memory architecture is presented which provides efficient architectural support for checkpointing and roll-forward recovery mechanisms in distributed systems. Unlike existing techniques, the approach does not require the use of a discrete stable storage unit or explicit synchronization among the processors. A nonscheduled checkpointing mechanism is presented based on a cache-line replacement policy, instead of the conventionally used periodic checkpoint establishment protocols.",
keywords = "Buffer storage, Computer architecture, Distributed computer systems, Error detection, Network protocols, Program processors, Bidirectional cache, Checkpointing, Roll forward recovery, Synchronize processor, Computer system recovery",
author = "A. Mendelson and Neeraj Suri and O. Zimmerman",
year = "1996",
month = jun,
day = "12",
doi = "10.1109/FTPDS.1994.494475",
language = "English",
isbn = "0818668075",
pages = "59--68",
booktitle = "Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems",
publisher = "IEEE",
note = "IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems ; Conference date: 12-06-1996 Through 14-06-1996",

}

RIS

TY - GEN

T1 - Roll-forward recovery

T2 - IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems

AU - Mendelson, A.

AU - Suri, Neeraj

AU - Zimmerman, O.

PY - 1996/6/12

Y1 - 1996/6/12

N2 - A split-cache memory architecture is presented which provides efficient architectural support for checkpointing and roll-forward recovery mechanisms in distributed systems. Unlike existing techniques, the approach does not require the use of a discrete stable storage unit or explicit synchronization among the processors. A nonscheduled checkpointing mechanism is presented based on a cache-line replacement policy, instead of the conventionally used periodic checkpoint establishment protocols.

AB - A split-cache memory architecture is presented which provides efficient architectural support for checkpointing and roll-forward recovery mechanisms in distributed systems. Unlike existing techniques, the approach does not require the use of a discrete stable storage unit or explicit synchronization among the processors. A nonscheduled checkpointing mechanism is presented based on a cache-line replacement policy, instead of the conventionally used periodic checkpoint establishment protocols.

KW - Buffer storage

KW - Computer architecture

KW - Distributed computer systems

KW - Error detection

KW - Network protocols

KW - Program processors

KW - Bidirectional cache

KW - Checkpointing

KW - Roll forward recovery

KW - Synchronize processor

KW - Computer system recovery

U2 - 10.1109/FTPDS.1994.494475

DO - 10.1109/FTPDS.1994.494475

M3 - Conference contribution/Paper

SN - 0818668075

SP - 59

EP - 68

BT - Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems

PB - IEEE

Y2 - 12 June 1996 through 14 June 1996

ER -