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  1. 2023
  2. Published

    Defect formation in InGaAs/AlSb/InAs memory devices

    Trevisan, A., Hodgson, P., Lane, D., Hayne, M. & Koenraad, P. M., 25/05/2023, In: Journal of Vacuum Science and Technology B. 41, 4, 044001.

    Research output: Contribution to Journal/Magazine › Journal article › peer-review

  3. 2022
  4. Published

    ULTRARAM: A Low-Energy, High-Endurance, Compound-Semiconductor Memory on Silicon

    Hodgson, P., Lane, D., Carrington, P., Delli, E., Beanland, R. & Hayne, M., 30/04/2022, In: Advanced Electronic Materials. 8, 4, 9 p., 2101103.

    Research output: Contribution to Journal/Magazine › Journal article › peer-review

  5. 2021
  6. Published

    Simulations of resonant tunnelling through InAs/AlSb heterostructures for ULTRARAM™ memory

    Lane, D. & Hayne, M., 22/06/2021, In: Journal of Physics D: Applied Physics. 54, 35, 7 p., 335104.

    Research output: Contribution to Journal/Magazine › Journal article › peer-review

  7. Published

    ULTRARAM: toward the development of a III-V semiconductor, non-volatile, random-access memory

    Lane, D., Hodgson, P., Potter, R., Beanland, R. & Hayne, M., 31/05/2021, In: IEEE Transactions on Electron Devices. 68, 5, p. 2271-2274 4 p.

    Research output: Contribution to Journal/Magazine › Journal article › peer-review

  8. Published

    Demonstration of a Fast, Low-Voltage, III-V Semiconductor, Non-Volatile Memory

    Lane, D., Hodgson, P., Potter, R. & Hayne, M., 12/05/2021, 2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). IEEE, p. 1-3 3 p.

    Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Conference contribution/Paper › peer-review

  9. Published

    ULTRARAM™: Design, Modelling, Fabrication and Testing of Ultra-low-power III-V Memory Devices and Arrays

    Lane, D., 2021, Lancaster University. 221 p.

    Research output: Thesis › Doctoral Thesis