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  • ULTRARAM-TED v4.2

    Accepted author manuscript, 817 KB, PDF document

    Available under license: CC BY: Creative Commons Attribution 4.0 International License

  • Lane Trans Electron Devices 68 2271 (2021)

    Final published version, 1.16 MB, PDF document

    Available under license: CC BY: Creative Commons Attribution 4.0 International License

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ULTRARAM™: towards the development of a III-V semiconductor, non-volatile, random-access memory

Research output: Contribution to journalJournal articlepeer-review

E-pub ahead of print
<mark>Journal publication date</mark>31/05/2021
<mark>Journal</mark>IEEE Transactions on Electron Devices
Issue number5
Volume68
Number of pages4
Pages (from-to)2271-2274
Publication StatusE-pub ahead of print
Early online date25/03/21
<mark>Original language</mark>English

Abstract

ULTRARAM™ is a III-V compound semiconductor memory concept which exploits quantum resonant tunneling to achieve non-volatility at extremely low switching energy per unit area. Prototype devices are fabricated in a 2x2 memory array formation on GaAs substrates. The devices show 0/1 state contrast from program/erase (P/E) cycles with 2.5 V pulses of 500-µs duration, a remarkable switching speed for a 20 µm gate length. Memory retention is tested for 8x104 s, whereby the 0/1 states show adequate contrast throughout, whilst performing 8x104 readout operations. Further reliability is demonstrated via program-read-erase-read endurance cycling for 106 cycles with 0/1 contrast. A half-voltage array architecture proposed in our previous work is experimentally realized, with an outstandingly small disturb rate over 105 half-voltage cycles.