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Designing high-performance & reliable superscalar architectures the out of order reliable superscalar (O3RS) approach

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Published
Publication date25/06/2000
Host publication Proceeding International Conference on Dependable Systems and Networks
PublisherIEEE
Pages473-481
Number of pages9
ISBN (Print)0769507077
<mark>Original language</mark>English
EventInternational Conference on Dependable Systems and Networks. - New York, United States
Duration: 25/06/200028/06/2000

Conference

ConferenceInternational Conference on Dependable Systems and Networks.
Abbreviated titleDSN 2000
Country/TerritoryUnited States
CityNew York
Period25/06/0028/06/00

Conference

ConferenceInternational Conference on Dependable Systems and Networks.
Abbreviated titleDSN 2000
Country/TerritoryUnited States
CityNew York
Period25/06/0028/06/00

Abstract

As VLSI geometry continues to shrink and the level of integration increases, it is expected that the probability of faults, particularly transient faults, will increase in future microprocessors. So far, fault tolerance has chiefly been considered for special purpose or safety critical systems, but future technology will likely require integrating fault tolerance techniques into commercial systems. Such systems require low cost solutions that are transparent to the system operation and do not degrade overall performance. This paper introduces a new superscalar architecture, termed as 03RS that aims to incorporate such simple fault tolerance mechanisms as part of the basic architecture.