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Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNChapter

Published

Standard

Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits. / Grange, M.; Weerasekera, R.; Pamunuwa, D. et al.
Workshop Notes, Design, Automation and Test in Europe (DATE). Nice, 2009.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNChapter

Harvard

Grange, M, Weerasekera, R, Pamunuwa, D & Tenhunen, H 2009, Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits. in Workshop Notes, Design, Automation and Test in Europe (DATE). Nice.

APA

Grange, M., Weerasekera, R., Pamunuwa, D., & Tenhunen, H. (2009). Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits. In Workshop Notes, Design, Automation and Test in Europe (DATE)

Vancouver

Grange M, Weerasekera R, Pamunuwa D, Tenhunen H. Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits. In Workshop Notes, Design, Automation and Test in Europe (DATE). Nice. 2009

Author

Grange, M. ; Weerasekera, R. ; Pamunuwa, D. et al. / Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits. Workshop Notes, Design, Automation and Test in Europe (DATE). Nice, 2009.

Bibtex

@inbook{9109ac38fe1546cf987194c4fb1c4b98,
title = "Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits",
author = "M. Grange and R. Weerasekera and D. Pamunuwa and H. Tenhunen",
year = "2009",
language = "English",
booktitle = "Workshop Notes, Design, Automation and Test in Europe (DATE)",

}

RIS

TY - CHAP

T1 - Exploration of Through Silicon Via Interconnect Parasitics for 3-Dimensional Integrated Circuits

AU - Grange, M.

AU - Weerasekera, R.

AU - Pamunuwa, D.

AU - Tenhunen, H.

PY - 2009

Y1 - 2009

M3 - Chapter

BT - Workshop Notes, Design, Automation and Test in Europe (DATE)

CY - Nice

ER -