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Modelling delay and noise in arbitrarily coupled RC trees.

Research output: Contribution to Journal/MagazineJournal articlepeer-review

Published
<mark>Journal publication date</mark>11/2005
<mark>Journal</mark>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue number11
Volume24
Number of pages15
Pages (from-to)1725-1739
Publication StatusPublished
<mark>Original language</mark>English

Abstract

Closed-form equations for second-order transfer functions of general arbitrarily coupled resistance-capacitance (RC) trees with multiple drivers are reported. The models allow precise delay and noise calculations for systems of coupled interconnects with guaranteed stability and represent the minimum complexity associated with this class of circuits. Their accuracy is extensively compared against other relevant models and is found to be better or comparable to more expensive models. All results are derived from a theoretical approach, and their physical basis is examined. The simplicity, accuracy, and generality of the models make them suitable for use in early signal integrity analyses of complex systems and incremental physical optimization.

Bibliographic note

Solving coupled RC tree circuits very efficiently is one of the most important tasks in the physical design of VLSI circuits. This paper derives a delay model that represents the minimum computational complexity associated with this class of circuits, and hence has the potential to reduce design time in achieving timing closure for multimillion transistor designs. The model was implemented into an experimental tool in collaboration with the Berkeley Research Laboratories of Cadence Design Systems, USA, the biggest company in the world in this field - contact: shauki@gmail.com. RAE_import_type : Journal article RAE_uoa_type : General Engineering