Research output: Contribution to Journal/Magazine › Journal article › peer-review
Research output: Contribution to Journal/Magazine › Journal article › peer-review
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TY - JOUR
T1 - Modelling noise and delay in VLSI circuits.
AU - Pamunuwa, Dinesh B.
AU - Elassaad, S.
AU - Tenhunen, H.
PY - 2003/2
Y1 - 2003/2
N2 - New models for estimating delay and noise in VLSI circuits, based on closed form expressions for the first and second moment of the impulse response in coupled RC trees are reported. The effect of crosstalk on delay and noise can be accurately estimated with a complexity only marginally higher than the Elmore delay.
AB - New models for estimating delay and noise in VLSI circuits, based on closed form expressions for the first and second moment of the impulse response in coupled RC trees are reported. The effect of crosstalk on delay and noise can be accurately estimated with a complexity only marginally higher than the Elmore delay.
U2 - 10.1049/el:20030208
DO - 10.1049/el:20030208
M3 - Journal article
VL - 39
SP - 269
EP - 271
JO - Electronics Letters
JF - Electronics Letters
SN - 0013-5194
IS - 3
ER -