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NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications

Research output: Contribution to Journal/Magazine › Journal article › peer-review

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NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications. / Soni, Mahesh; Soni, Ajay; Sharma, Satinder Kumar.
In: IEEE Transactions on Device and Materials Reliability, Vol. 20, No. 3, 570-575, 01.09.2020.

Research output: Contribution to Journal/Magazine › Journal article › peer-review

Harvard

Soni, M, Soni, A & Sharma, SK 2020, 'NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications', IEEE Transactions on Device and Materials Reliability, vol. 20, no. 3, 570-575. https://doi.org/10.1109/TDMR.2020.3010267

APA

Soni, M., Soni, A., & Sharma, S. K. (2020). NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications. IEEE Transactions on Device and Materials Reliability, 20(3), Article 570-575. https://doi.org/10.1109/TDMR.2020.3010267

Vancouver

Soni M, Soni A, Sharma SK. NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications. IEEE Transactions on Device and Materials Reliability. 2020 Sept 1;20(3):570-575. Epub 2020 Jul 20. doi: 10.1109/TDMR.2020.3010267

Author

Soni, Mahesh ; Soni, Ajay ; Sharma, Satinder Kumar. / NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications. In: IEEE Transactions on Device and Materials Reliability. 2020 ; Vol. 20, No. 3.

Bibtex

@article{f0ec27f0745343aa8027d2b54895a17c,
title = "NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications",
abstract = "This paper presents an ultra.thin silicon oxynitride (SiOXNY, 4 nm) tunneling layer, nitrogen functionalized reduced graphene oxide (NrGO, 3.5 layer) floating gate (FG) and poly (methyl methacrylate) (PMMA, 60 nm) blocking layers based Al/PMMA/NrGO/SiOXNY/p.Si/Au, non.volatile flash memory (NVFM) structures. The ultra.thin SiOXNY helps in improving the interface with Si, resulting in lower gate leakage current density and considerable enhanced retention characteristics. The nitrogen engineered GO followed by reduction to NrGO under UV illumination attributes to the modification of the physiochemical properties, hence beneficial for non-volatile memory applications. The uniform, stress free and low temperature processing advocates the potential of PMMA as blocking layer for improved memory characteristics. The electrical characterizations on the fabricated Al/PMMA/NrGO/SiOXNY/p.Si/Au gate stack demonstrates a memory window (δW) of 1.25 V @ ± 3 V and 2.6 V @ ± 5 V, low gate leakage current density (J) 10 nA/cm2 @ -1 V, retention 3 1011 sec (> 10 years with extrapolation) and endurance of more than 100 cycles.",
author = "Mahesh Soni and Ajay Soni and Sharma, {Satinder Kumar}",
year = "2020",
month = sep,
day = "1",
doi = "10.1109/TDMR.2020.3010267",
language = "English",
volume = "20",
journal = "IEEE Transactions on Device and Materials Reliability",
issn = "1530-4388",
publisher = "IEEE",
number = "3",

}

RIS

TY - JOUR

T1 - NrGO Floating Gate/SiOXNY Tunneling Layer Stack for Nonvolatile Flash Memory Applications

AU - Soni, Mahesh

AU - Soni, Ajay

AU - Sharma, Satinder Kumar

PY - 2020/9/1

Y1 - 2020/9/1

N2 - This paper presents an ultra.thin silicon oxynitride (SiOXNY, 4 nm) tunneling layer, nitrogen functionalized reduced graphene oxide (NrGO, 3.5 layer) floating gate (FG) and poly (methyl methacrylate) (PMMA, 60 nm) blocking layers based Al/PMMA/NrGO/SiOXNY/p.Si/Au, non.volatile flash memory (NVFM) structures. The ultra.thin SiOXNY helps in improving the interface with Si, resulting in lower gate leakage current density and considerable enhanced retention characteristics. The nitrogen engineered GO followed by reduction to NrGO under UV illumination attributes to the modification of the physiochemical properties, hence beneficial for non-volatile memory applications. The uniform, stress free and low temperature processing advocates the potential of PMMA as blocking layer for improved memory characteristics. The electrical characterizations on the fabricated Al/PMMA/NrGO/SiOXNY/p.Si/Au gate stack demonstrates a memory window (δW) of 1.25 V @ ± 3 V and 2.6 V @ ± 5 V, low gate leakage current density (J) 10 nA/cm2 @ -1 V, retention 3 1011 sec (> 10 years with extrapolation) and endurance of more than 100 cycles.

AB - This paper presents an ultra.thin silicon oxynitride (SiOXNY, 4 nm) tunneling layer, nitrogen functionalized reduced graphene oxide (NrGO, 3.5 layer) floating gate (FG) and poly (methyl methacrylate) (PMMA, 60 nm) blocking layers based Al/PMMA/NrGO/SiOXNY/p.Si/Au, non.volatile flash memory (NVFM) structures. The ultra.thin SiOXNY helps in improving the interface with Si, resulting in lower gate leakage current density and considerable enhanced retention characteristics. The nitrogen engineered GO followed by reduction to NrGO under UV illumination attributes to the modification of the physiochemical properties, hence beneficial for non-volatile memory applications. The uniform, stress free and low temperature processing advocates the potential of PMMA as blocking layer for improved memory characteristics. The electrical characterizations on the fabricated Al/PMMA/NrGO/SiOXNY/p.Si/Au gate stack demonstrates a memory window (δW) of 1.25 V @ ± 3 V and 2.6 V @ ± 5 V, low gate leakage current density (J) 10 nA/cm2 @ -1 V, retention 3 1011 sec (> 10 years with extrapolation) and endurance of more than 100 cycles.

U2 - 10.1109/TDMR.2020.3010267

DO - 10.1109/TDMR.2020.3010267

M3 - Journal article

VL - 20

JO - IEEE Transactions on Device and Materials Reliability

JF - IEEE Transactions on Device and Materials Reliability

SN - 1530-4388

IS - 3

M1 - 570-575

ER -