Home > Research > Publications & Outputs > Performance of the upgraded PreProcessor of the...

Links

Text available via DOI:

View graph of relations

Performance of the upgraded PreProcessor of the ATLAS Level-1 Calorimeter Trigger

Research output: Contribution to Journal/MagazineJournal articlepeer-review

Published

Standard

Harvard

APA

Vancouver

Author

Bibtex

@article{20acd3b4ec7a4e719b08d3726864b699,
title = "Performance of the upgraded PreProcessor of the ATLAS Level-1 Calorimeter Trigger",
abstract = "The PreProcessor of the ATLAS Level-1 Calorimeter Trigger prepares the analogue trigger signals sent from the ATLAS calorimeters by digitising, synchronising, and calibrating them to reconstruct transverse energy deposits, which are then used in further processing to identify event features. During the first long shutdown of the LHC from 2013 to 2014, the central components of the PreProcessor, the Multichip Modules, were replaced by upgraded versions that feature modern ADC and FPGA technology to ensure optimal performance in the high pile-up environment of LHC Run 2. This paper describes the features of the new Multichip Modules along with the improvements to the signal processing achieved. ",
keywords = "Calorimeters, Trigger concepts and systems (hardware and software), Microprocessor chips, Piles, Signal processing, Central component, FPGA technology, Level-1, Optimal performance, Pile-ups, Transverse energy, Multichip modules",
author = "ATLAS Collaboration and A.E. Barton and I.A. Bertram and G. Borissov and E.V. Bouhova-Thacker and H. Fox and R.C.W. Henderson and R.W.L. Jones and V. Kartvelishvili and R.E. Long and P.A. Love and D. Muenstermann and A.J. Parker and Izaac Sanderswood and M. Smizanska and A.S. Tee and J. Walder and A.M. Wharton and B.W. Whitmore and Melissa Yexley",
year = "2020",
month = nov,
day = "10",
doi = "10.1088/1748-0221/15/11/P11016",
language = "English",
volume = "15",
journal = "Journal of Instrumentation",
issn = "1748-0221",
publisher = "Institute of Physics Publishing",
number = "11",

}

RIS

TY - JOUR

T1 - Performance of the upgraded PreProcessor of the ATLAS Level-1 Calorimeter Trigger

AU - Collaboration, ATLAS

AU - Barton, A.E.

AU - Bertram, I.A.

AU - Borissov, G.

AU - Bouhova-Thacker, E.V.

AU - Fox, H.

AU - Henderson, R.C.W.

AU - Jones, R.W.L.

AU - Kartvelishvili, V.

AU - Long, R.E.

AU - Love, P.A.

AU - Muenstermann, D.

AU - Parker, A.J.

AU - Sanderswood, Izaac

AU - Smizanska, M.

AU - Tee, A.S.

AU - Walder, J.

AU - Wharton, A.M.

AU - Whitmore, B.W.

AU - Yexley, Melissa

PY - 2020/11/10

Y1 - 2020/11/10

N2 - The PreProcessor of the ATLAS Level-1 Calorimeter Trigger prepares the analogue trigger signals sent from the ATLAS calorimeters by digitising, synchronising, and calibrating them to reconstruct transverse energy deposits, which are then used in further processing to identify event features. During the first long shutdown of the LHC from 2013 to 2014, the central components of the PreProcessor, the Multichip Modules, were replaced by upgraded versions that feature modern ADC and FPGA technology to ensure optimal performance in the high pile-up environment of LHC Run 2. This paper describes the features of the new Multichip Modules along with the improvements to the signal processing achieved.

AB - The PreProcessor of the ATLAS Level-1 Calorimeter Trigger prepares the analogue trigger signals sent from the ATLAS calorimeters by digitising, synchronising, and calibrating them to reconstruct transverse energy deposits, which are then used in further processing to identify event features. During the first long shutdown of the LHC from 2013 to 2014, the central components of the PreProcessor, the Multichip Modules, were replaced by upgraded versions that feature modern ADC and FPGA technology to ensure optimal performance in the high pile-up environment of LHC Run 2. This paper describes the features of the new Multichip Modules along with the improvements to the signal processing achieved.

KW - Calorimeters

KW - Trigger concepts and systems (hardware and software)

KW - Microprocessor chips

KW - Piles

KW - Signal processing

KW - Central component

KW - FPGA technology

KW - Level-1

KW - Optimal performance

KW - Pile-ups

KW - Transverse energy

KW - Multichip modules

U2 - 10.1088/1748-0221/15/11/P11016

DO - 10.1088/1748-0221/15/11/P11016

M3 - Journal article

VL - 15

JO - Journal of Instrumentation

JF - Journal of Instrumentation

SN - 1748-0221

IS - 11

M1 - P11016

ER -