TY - JOUR

T1 - Simple digital only test approach for embedded charge-pump phase-locked loops.

AU - Burbidge, M.

AU - Richardson, Andrew M. D.

N1 - "©2001 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE." "This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder."

PY - 2001

Y1 - 2001

N2 - Techniques for a simple automated test approach for high performance fully embedded charge-pump phase-locked loops (CP-PLLs) are explained. The test approach is focused towards non-invasive high volume production testing of PLLs using digital only testers in conjunction with additional on-chip circuitry

AB - Techniques for a simple automated test approach for high performance fully embedded charge-pump phase-locked loops (CP-PLLs) are explained. The test approach is focused towards non-invasive high volume production testing of PLLs using digital only testers in conjunction with additional on-chip circuitry

U2 - 10.1049/el:20010914

DO - 10.1049/el:20010914

M3 - Journal article

VL - 37

SP - 1318

EP - 1319

JO - Electronics Letters

JF - Electronics Letters

SN - 0013-5194

IS - 22

ER -