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Supply current monitoring in cmos circuits for reliability prediction and test.

Research output: Contribution to Journal/MagazineJournal article

<mark>Journal publication date</mark>1992
<mark>Journal</mark>Quality and Reliability Engineering International
Issue number6
Number of pages6
Pages (from-to)543-548
Publication StatusPublished
<mark>Original language</mark>English


The monitoring of supply current in CMOS VLSI devices has been suggested as a tool for both detecting reliability hazards and increasing the effectiveness of standard functional testing. This paper reviews these techniques and describes a method used at Lancaster for evaluating the IDDQ test.