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Translating Structural Process Properties to Petri Net Markings

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNConference contribution/Paperpeer-review

Published
Publication date2/08/2012
Host publication2012 12th International Conference on Application of Concurrency to System Design
PublisherIEEE
Number of pages10
ISBN (electronic)9780769547091
ISBN (print)9781467316873
<mark>Original language</mark>English

Abstract

We introduce a spatio-temporal logic PSTL defined on Pi-Calculus processes. This logic is especially suited to formulate properties in relation to the structural semantics of the Pi-Calculus due to Meyer, a representation of processes as Petri nets. To allow for the use of well-researched verification techniques, we present a translation of a subset of PSTL to LTL on Petri nets. We further prove soundness of our translation.