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Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNChapter

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Standard

Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits. / Weldezion, A.; Weerasekera, Roshan; Pamunuwa, Danesh B. et al.

Workshop Notes, Design, Automation and Test in Europe (DATE). Nice, 2009.

Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSNChapter

Harvard

Weldezion, A, Weerasekera, R, Pamunuwa, DB, Zheng, L-R & Tenhunen, H 2009, Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits. in Workshop Notes, Design, Automation and Test in Europe (DATE). Nice.

APA

Weldezion, A., Weerasekera, R., Pamunuwa, D. B., Zheng, L-R., & Tenhunen, H. (2009). Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits. In Workshop Notes, Design, Automation and Test in Europe (DATE)

Vancouver

Weldezion A, Weerasekera R, Pamunuwa DB, Zheng L-R, Tenhunen H. Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits. In Workshop Notes, Design, Automation and Test in Europe (DATE). Nice. 2009

Author

Weldezion, A. ; Weerasekera, Roshan ; Pamunuwa, Danesh B. et al. / Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits. Workshop Notes, Design, Automation and Test in Europe (DATE). Nice, 2009.

Bibtex

@inbook{0b99a167d85f40ac98e041b9a50e1b3e,
title = "Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits.",
author = "A. Weldezion and Roshan Weerasekera and Pamunuwa, {Danesh B.} and Li-Rong Zheng and Hannu Tenhunen",
year = "2009",
language = "English",
booktitle = "Workshop Notes, Design, Automation and Test in Europe (DATE)",

}

RIS

TY - CHAP

T1 - Bandwidth optimization for through silicon via (TSV) bundles in 3D integrated circuits.

AU - Weldezion, A.

AU - Weerasekera, Roshan

AU - Pamunuwa, Danesh B.

AU - Zheng, Li-Rong

AU - Tenhunen, Hannu

PY - 2009

Y1 - 2009

M3 - Chapter

BT - Workshop Notes, Design, Automation and Test in Europe (DATE)

CY - Nice

ER -