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Harvard
Weerasekera, R, Pamunuwa, DB, Grange, M, Tenhunen, H & Zheng, L-R 2009,
Closed-form equations for through-silicon via (TSV) parasitics in 3-D integrated circuits (ICs). in
Workshop Notes, Design, Automation and Test in Europe (DATE). Nice.
APA
Weerasekera, R., Pamunuwa, D. B., Grange, M., Tenhunen, H., & Zheng, L.-R. (2009).
Closed-form equations for through-silicon via (TSV) parasitics in 3-D integrated circuits (ICs). In
Workshop Notes, Design, Automation and Test in Europe (DATE)
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Bibtex
@inbook{9af524c67a0c47f4a164cc0f47b2f3f6,
title = "Closed-form equations for through-silicon via (TSV) parasitics in 3-D integrated circuits (ICs).",
author = "Roshan Weerasekera and Pamunuwa, {Dinesh B.} and M. Grange and Hannu Tenhunen and Li-Rong Zheng",
year = "2009",
language = "English",
booktitle = "Workshop Notes, Design, Automation and Test in Europe (DATE)",
}
RIS
TY - CHAP
T1 - Closed-form equations for through-silicon via (TSV) parasitics in 3-D integrated circuits (ICs).
AU - Weerasekera, Roshan
AU - Pamunuwa, Dinesh B.
AU - Grange, M.
AU - Tenhunen, Hannu
AU - Zheng, Li-Rong
PY - 2009
Y1 - 2009
M3 - Chapter
BT - Workshop Notes, Design, Automation and Test in Europe (DATE)
CY - Nice
ER -