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Feasibility demonstration of new e-NVM cells suitable for integration at 28nm

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Published
Publication date3/07/2017
Host publication2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
PublisherIEEE
<mark>Original language</mark>English

Abstract

Memory cell selection for 28 nm and beyond and its integration into new eNVM technology have been investigated through atomic layer deposition (ALD) HfO 2 resistive memory devices. Both amorphous and crystalline HfO 2 layers exhibit promising switching characteristics. It was shown that more than 3 times less power is required to activate the memory device fabricated using the amorphous layer. The forming voltages for both of the memory cell are greater than 10 Volt relative to layer thickness of 50 nm. As an alternative potential resistive memory element, SiOx layer formed on n and p type Si wafers exhibited interesting forming features.