Final published version
Research output: Contribution to Journal/Magazine › Journal article › peer-review
Research output: Contribution to Journal/Magazine › Journal article › peer-review
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TY - JOUR
T1 - Implementation of Single-Electron Transistor with Resistive Gate
AU - Pashkin, Yuri
AU - Nakamura, Yasunobu
AU - Tsai, Jaw Shen
PY - 1999
Y1 - 1999
N2 - We have fabricated and measured a resistively coupled single electron transistor (R-SET). In our implementation, a chromium thin-film resistive gate was connected directly to a mesoscopic island formed between two ultrasmall AI/AIOx/AI tunnel junctions. The transistor was fabricated by electron beam lithography using the suspended bridge technique. We have measured the current-voltage-gate voltage dependences of the R-SET and observed a characteristic Coulomb blockade pattern. Our simulations based on the orthodox theory of single electron tunneling show good qualitative agreement with the experimental data.
AB - We have fabricated and measured a resistively coupled single electron transistor (R-SET). In our implementation, a chromium thin-film resistive gate was connected directly to a mesoscopic island formed between two ultrasmall AI/AIOx/AI tunnel junctions. The transistor was fabricated by electron beam lithography using the suspended bridge technique. We have measured the current-voltage-gate voltage dependences of the R-SET and observed a characteristic Coulomb blockade pattern. Our simulations based on the orthodox theory of single electron tunneling show good qualitative agreement with the experimental data.
KW - C-SET
KW - Coulomb blockade
KW - R-SET
KW - Single electron transistor
KW - Single electron tunneling
U2 - 10.1143/JJAP.38.406
DO - 10.1143/JJAP.38.406
M3 - Journal article
VL - 38
SP - 406
EP - 409
JO - Japanese Journal of Applied Physics
JF - Japanese Journal of Applied Physics
SN - 0021-4922
IS - 1S
ER -