TY - BOOK

T1 - The Field Effect Inverter

T2 - Concept, Design, Simulation, Fabrication, and Testing of a Unipolar Digital Logic Device

AU - Hall, Jonathan

PY - 2025

Y1 - 2025

N2 - In this thesis, a unipolar digital logic device — the field-effect inverter (FEI) — is proposed, combining physics-based simulations and experimental development. Each FEI device performs the combined function of both n and pmetal-oxide-semiconductor (MOS) transistors in the conventional complementary-MOS(CMOS) inverter, achieving fully symmetric logic operation in a compact form using only either electrons (e-FEI) or holes (h-FEI). The structure consists of two charge-accepting channel layers sandwiching a central electron (or hole) reservoir. Applying positive or negative gate bias moves the charge into the top or bottom channel respectively, achieving the complementary requirement of logic with only a single polarity of charge carrier.This thesis outlines the FEI concept in detail ,demonstrating its universality as a new core building block for digital logic through the NAND and NOR gates. One-dimensional simulations in next nano++ illustrate the feasibility of implementation in three semiconductor material systems: GaAs/AlxGa1−x As,the 6.1-Å family (GaSb/In1 − yGayAs/AlSb), and SiGe alloys. Simulations indicate excellent performance in all systems, with high channel-channel contrast of up to107 cm−2 in integrated carrier density, switching at less than ±2 V, and perfect symmetry between channels, with compound semiconductor systems have an inherent advantage of intrinsically higher mobility.e-FEI devices with gate lengths varying from 10-56 μmweresuccessfully grown and fabricated in both GaAs/AlxGa1−xAs, and the 6.1-Å family. Electrical characterisation revealed expected conductivity trends, with “on-off” channel contrast ratios of ≈ 3× for the GaAs/AlxGa1−xAs e-FEI, and 10 − 100× for the 6.1-Åfamily e-FEI, with switching biases agreeing with the simulations at 1.0 − 1.5 V. However, excessive device leakage hindered performance. These findings suggest the FEI could be a promising beyond CMOS logic device, although research must be done to fully understand the physical operation through multidimensional simulation, and to reduce leakage in fabricated devices.

AB - In this thesis, a unipolar digital logic device — the field-effect inverter (FEI) — is proposed, combining physics-based simulations and experimental development. Each FEI device performs the combined function of both n and pmetal-oxide-semiconductor (MOS) transistors in the conventional complementary-MOS(CMOS) inverter, achieving fully symmetric logic operation in a compact form using only either electrons (e-FEI) or holes (h-FEI). The structure consists of two charge-accepting channel layers sandwiching a central electron (or hole) reservoir. Applying positive or negative gate bias moves the charge into the top or bottom channel respectively, achieving the complementary requirement of logic with only a single polarity of charge carrier.This thesis outlines the FEI concept in detail ,demonstrating its universality as a new core building block for digital logic through the NAND and NOR gates. One-dimensional simulations in next nano++ illustrate the feasibility of implementation in three semiconductor material systems: GaAs/AlxGa1−x As,the 6.1-Å family (GaSb/In1 − yGayAs/AlSb), and SiGe alloys. Simulations indicate excellent performance in all systems, with high channel-channel contrast of up to107 cm−2 in integrated carrier density, switching at less than ±2 V, and perfect symmetry between channels, with compound semiconductor systems have an inherent advantage of intrinsically higher mobility.e-FEI devices with gate lengths varying from 10-56 μmweresuccessfully grown and fabricated in both GaAs/AlxGa1−xAs, and the 6.1-Å family. Electrical characterisation revealed expected conductivity trends, with “on-off” channel contrast ratios of ≈ 3× for the GaAs/AlxGa1−xAs e-FEI, and 10 − 100× for the 6.1-Åfamily e-FEI, with switching biases agreeing with the simulations at 1.0 − 1.5 V. However, excessive device leakage hindered performance. These findings suggest the FEI could be a promising beyond CMOS logic device, although research must be done to fully understand the physical operation through multidimensional simulation, and to reduce leakage in fabricated devices.

U2 - 10.17635/lancaster/thesis/2744

DO - 10.17635/lancaster/thesis/2744

M3 - Doctoral Thesis

PB - Lancaster University

ER -