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Professor Andrew Richardson

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  1. Published

    Aspects of current reference generation and distribution for IDDx pass/fail current determination.

    Bratt, A., Harvey, R. J. A., Dorey, A. P. & Richardson, A. M. D., 1993, Proceedings of the IEE colloquium on mixed signal VLSI test, digest No 1993/240. London

    Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter

  2. Published

    Design-for-test structure to facilitate test vector application with low performance loss in non-test mode.

    Bratt, A., Harvey, R. J. A., Dorey, A. P. & Richardson, A. M. D., 1993, In: Electronics Letters. 29, 16, p. 1438-1440 3 p.

    Research output: Contribution to Journal/Magazine › Journal article

  3. Published

    Motivations and techniques of built in self-test for embedded frequency synthesis systems incorporating charge pump phase-locked loops.

    Burbidge, M., Lechner, A., Bell, G. & Richardson, A. M. D., 2004, IEE proceedings - circuits, devices and systems. 4 ed. Vol. 151. p. 337-348 12 p.

    Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter

  4. Published

    Evaluation and detection of deterministic jitter causes in CP-PLLs due to macro level faults and pre-detection using simple methods.

    Burbidge, M. J., Lechner, A. & Richardson, A. M. D., 2003, In: Proceedings of the 9th IEEE international mixed signal test workshop (IMSTW03). p. 157-164 8 p.

    Research output: Contribution to Journal/Magazine › Journal article

  5. Published

    Investigations for minimum invasion digital only built in ‘ramp’ based test techniques for charge pump PLLs.

    Burbidge, M. J., Poullet, F., Tijou, J. & Richardson, A. M. D., 08/2003, In: Journal of Electronic Testing. 19, 4, p. 481-490 10 p.

    Research output: Contribution to Journal/Magazine › Journal article

  6. Published

    Investigations of automatic built in transient step response monitoring for embedded second order charge pump phase locked loop frequency synthesizers.

    Burbidge, M. J., Tijou, J. & Richardson, A. M. D., 2003, In: Journal of Electronic Testing.

    Research output: Contribution to Journal/Magazine › Journal article

  7. Published

    Techniques for automatic on chip closed loop transfer function monitoring for embedded charge pump phase locked loops.

    Burbidge, M. J., Tijou, J. & Richardson, A. M. D., 19/12/2003, Design, Automation and Test in Europe Conference and Exhibition, 2003. p. 496-501 6 p.

    Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter

  8. Published

    Investigations for minimum invasion digital only built in ‘ramp’ based test techniques for charge pump PLLs.

    Burbidge, M. J., Tijou, J., Poullet, F. & Richardson, A. M. D., 2002, Proceedings of the Seventh IEEE European Test Workshop, 2002.. IEEE, p. 95-102 8 p.

    Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter

  9. Published

    Simple digital only test approach for embedded charge-pump phase-locked loops.

    Burbidge, M. & Richardson, A. M. D., 2001, In: Electronics Letters. 37, 22, p. 1318-1319 2 p.

    Research output: Contribution to Journal/Magazine › Journal article

  10. Published

    Test techniques for embedded charge pump phase-locked loops: problems, current BIST techniques and alternative suggestions.

    Burbidge, M., Richardson, A. M. D. & Lechner, A., 2001, Proceedings of the 7th IEEE international test workshop. p. 97-102 6 p.

    Research output: Contribution in Book/Report/Proceedings - With ISBN/ISSN › Chapter

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